Arm recently announced that the company, together with AMD and NVIDIA, has been appointed as a board member of the Open Compute Project (OCP), highlighting Arm’s unique technical leadership in promoting industry openness and standardization. Arm pointed out that as a member of the OCP board of directors, it will work with leading companies such as Meta, Google, Intel and Microsoft to promote innovation in open and interoperable design in the field of AI data centers.
Mohamed Awad, senior vice president and general manager of Arm's infrastructure business group, said that data centers are undergoing an unprecedented major transformation, from general-purpose servers to rack-level systems and large-scale clusters specifically built for AI; they are also facing power consumption challenges. By 2025, the computing power of a single AI rack will reach the level of top supercomputers in 2020, and the power consumption will be equivalent to the total electricity consumption of about 100 American households. To meet this challenge, it is imperative to push infrastructure to a new stage, and in a rapidly evolving ecosystem, open collaboration is key.
Arm stated that the converged AI data center is regarded as the next stage of infrastructure evolution, which is to reduce the overall power consumption and corresponding costs required for AI execution by maximizing the AI computing density per unit area. In this regard, Arm Neoverse has become a core pillar at all levels of the AI technology stack, assisting manufacturers in optimizing three key links: the accuracy of converting data into tokens, the drive of tokens to high-order AI models and AI agents, and the actual value of AI in scientific, medical, and commercial applications.
However, the development of integrated AI data centers cannot rely solely on a single general-purpose chip. To increase system integration density, high-end chips designed for specific applications will become key. Arm recently announced that it would contribute the "Fundamental Small Chip System Architecture" (FCSA) specification definition to OCP to deepen industrial cooperation in the small chip field.
Arm pointed out that FCSA continues the research and development results of Arm's Small Chip System Architecture (CSA), and at the same time, in response to industry needs, it creates a neutral framework that does not rely on specific suppliers and is not bound to the CPU architecture. This specification definition provides a unified standard for small chip system and interface definition, which not only accelerates small chip design and integration, but also promotes large-scale reuse and interoperability.
Arm stated that its partners have launched the first batch of small chip products that meet the Arm CSA specification definition, and multiple design projects are in progress. Based on this achievement, Arm has further expanded the scale of Arm Total Design ecosystem, adding 10 new partners, namely Sechi Electronics, ASE, Astera Labs, CoAsia, Credo, Eliyan, Insyde Software, Marvell, Rebellions, and VIA NEXT. The professional strength of these partners in the fields of advanced packaging, interconnection technology and system integration will promote a new round of standard formulation and innovation process, accelerating the full cycle innovation of small chip design from IP and EDA tools to manufacturing, packaging and verification.
Recently, Arm has also joined the “ESUN” collaboration project under the OCP network project to jointly promote Ethernet technology innovation for large-scale AI applications.
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